By Patrick Carribault, Marc Pérache, Hervé Jourdren (auth.), Mitsuhisa Sato, Toshihiro Hanawa, Matthias S. Müller, Barbara M. Chapman, Bronis R. de Supinski (eds.)

ISBN-10: 3642132162

ISBN-13: 9783642132162

ISBN-10: 3642132170

ISBN-13: 9783642132179

This booklet constitutes the refereed lawsuits of the sixth foreign Workshop on OpenMP, IWOMP 2010, held in Tsukuba urban, Japan, in June 2010. The papers are prepared in topical sections on Runtime and Optimization, Proposed Extensions to OpenMP, Scheduling and function, in addition to Hybrid Programming and Accelerators with OpenMP.

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Extra resources for Beyond Loop Level Parallelism in OpenMP: Accelerators, Tasking and More: 6th Internationan Workshop on OpenMP, IWOMP 2010, Tsukuba, Japan, June 14-16, 2010 Proceedings

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Schmidl et al. In the case with four outer and one inner threads, we have the same total number of threads, but now every outer thread initializes its own arrays a, b and c. On the Barcelona machine this leads to a much higher total memory bandwidth, because now the memory of all four sockets is used. Even in the unbound case, we see nearly the same bandwidth. It seems that the scheduler is smart enough to use all the four sockets. On the Tigerton machine, the bound case delivers good memory bandwidth as well, but in the unbound case the result is worse.

0 of the for loop (lines 18–22). After executing the loop, each thread stores its partial results in the temporary arrays (line 23 and 24). After the parallel region, the master thread iterates over all partial results in the temporary arrays and produces the final result of the computation (lines 26–29). Although this implementation performs well for small thread counts, larger thread counts might benefit from a tree-based reduction. Tree-based reductions are significantly more complicated and require a much higher coding effort.

34 D. Schmidl et al. 93 GHz and 64 GB of memory. All processors access the whole main memory via Intel’s north bridge, therefore this is an SMP system with a flat memory architecture. Barcelona (IBM eServer LS42): This is a 4 socket machine as well, equipped with AMD Opteron 8356 processors. 3 GHz and is connected to 8 GB of local memory. Remote access to the memory of other processors is accomplished via the Hyper-Transport interconnect. This machine offers a cc-NUMA architecture. ScaleMP: From a hardware point of view, this machine is not a single node, but a small Infiniband cluster.

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Beyond Loop Level Parallelism in OpenMP: Accelerators, Tasking and More: 6th Internationan Workshop on OpenMP, IWOMP 2010, Tsukuba, Japan, June 14-16, 2010 Proceedings by Patrick Carribault, Marc Pérache, Hervé Jourdren (auth.), Mitsuhisa Sato, Toshihiro Hanawa, Matthias S. Müller, Barbara M. Chapman, Bronis R. de Supinski (eds.)


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